In this work we have designed a microprocessor, based on programmable logic device with the help of VHDL. The processor is aimed at teaching the subject of digital electronics, where students shall learn to handle VHDL and be introduced to microprocessors.

The function of an eight bit microprocessor could be successfully described in VHDL and synthesised using tools available in the digital electronic lab. The target device is a 512 macrocells CPLD (Complex Programmable Logic Device) of the Ultra37000family from Cypress Semiconductors.

This processor, named VHDLmicro, runs with 1 MHz internally. In its present implementation VHDLmicro is designed in the classical form of a von-Neumann computer architecture. It has an instruction set with 29 different 16 bit long instructions and is able to address up to 2048 bytes of external code memory. During the program execution 256 bytes data memory and a stack of 256 bytes are available. Two eight bit input- and one eight bit output-port are available for external peripheries.

It was important to realise a product which is flexible and also simple to understand and modify. The design is realised in three separate modules. Each module fits the INDIGEL evaluation board, which is already in use in this university.

The three modules of VHDLmicro are on its present form the CPLD board, external memory module and a I/O module with LEDs, segment displays and switches. 80 I/O lines are also available on the CPLD for further control capacity, functionality being only limited by the size of the CPLD.

A huge advantage is the In-System Reprogrammable (ISR) device using the integrated JTAG interface. This feature allows to change the design without any changes in the hardware. In this way it is easy and possible to change or to enhance the design of the VHDLmicro.

In this diploma work a system was worked out, which is able to utilize and analyse results of two different sensor types measuring air humidity and temperature controlled over an SPI-interface or a 2-Wire-connection.

The measuring data can be passed on to the user over the GSM network through short messages or through a serial RS232-interface be displayed on a PC. This solution is useful for remote supervision at and from different locations.

The hardware consists of the FELA remote module, on which the Texas Instruments microcontroller MSP430F149 is implemented with the FELA GSM module. The attached sensor adapter connects both sensor types.

The main task of the diploma work was the developing of the high-level language C microcontroller software:

The sensor data are analysed, buffered to calculate the mean, max and min values. They will be sent at certain times or at an user's request. The alarm function displays low or high limited valuees. For the controlling of the GSM remote sensor, an instruction set was developed, which allows to define the interval of the data:

• once a day
• once an hour
• once a minute
• current measurement can be requested
• the status of the module
• min an max limits.

The sensor adapter provides the operating voltage of the sensor and carries out the adjustment of the signal level. Three LED's display the operating mode, the GSM receiving quality and the status of the initialization. The links to the serial interface and to the sensors are also integrated on the print.

In collaboration with Sensirion a controlling system has been developed to measure the volume of liquid in micro litres. For that purpose the actual quantity of liquid flowing through a sensor is measured and integrated. The flow of liquid is stopped by a valve at the predetermined quantity. The actual system is a possible implementation of the new Liquid Flow Sensor ASF 1430 of Sensirion.

The hardware consists of an Altera FPGA, an EEPROM, a valve control, an LCD display and the controlling buttons. The sensor uses an SPI interface.

The software has been written in the hardware describing language VHDL. Evaluated data from the sensor are displayed on a 16 x 4 LCD matrix. Four buttons control several system modes: starting and ending adjusting parameters.

The components of the software were completely realised and tested on a developing board. The actual system realizes only a single mode due to the limited FPGA core size.